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LDO线性稳压器中的折返式限流电路设计
发表时间：2008-05-31 浏览量：3584 下载量：1596
| 全部作者： | 张帆，吕亚兰，相征 |
| 作者单位： | 西安电子科技大学通信工程学院；西安电子科技大学电路CAD研究所 |
| 摘 要： | 本文提出了一种低功耗、高可靠性的限流电路。低压降（low dropout,LDO）线性稳压器成本低、噪声小，其应用日渐广泛，但LDO线性稳压器的功耗相对于高效率的DC/DC转换器略偏高，因此如何降低LDO线性稳压器的功耗是亟待解决的难题。本文所提出的限流电路通过增加折返功能有效降低了电路功耗，并且提高了系统的可靠性。对该结构原理进行分析，并用2 μm 40 V 双极结型晶体管（bipolar junction transistor,BJT）工艺进行模拟验证。在该工艺下，Hspice仿真证明了该电路的可行性和可靠性。对于一款带载能力为1 A的低功耗LDO线性稳压器，与常规的恒定电流限制相比，该电路能使系统在限流状态下的功耗减小75％，并能成功应用在输出为12 V的LDO线性稳压器上。 |
| 关 键 词： | 电路与系统；低功耗；折返；线性稳压器 |
| Title： | Design of fold-back current limit circuit in LDO linear regulator |
| Author： | ZHANG Fan, LV Yalan, XIANG Zheng |
| Organization： | College of Telecommunication Engineering, Xidian University；Institute of Electronic CAD, Xidian University |
| Abstract： | In this paper, a low-power, high reliability current limit circuit is proposed. Because of the low cost and low noise, the low dropout(LDO) linearity regulator is widely used. The LDO has higher quiescent dissipation compared with the high efficient DC/DC converter, so the problem about how to decrease the quiescent dissipation is in dire need of solving. The current limit circuit which is proposed in the paper can effectively lower the circuit's quiescent dissipation, and enhance the reliability of the system with the application of fold back function. The structure and principles were analyzed and simulated with 2 μm 40 V BJT process. With this process, the feasibility and reliability of the circuit was proved by Hspice. The circuit can reduce the quiescent dissipation 75％ compared with the conventional constant current limit under the 1 A load current condition. It has been used in a low dropout voltage(LDO) linear buck regulator with 12 V output voltage successfully. |
| Key words： | circuit and system; low quiescent dissipation; fold back; linearity regulator |
| 发表期数： | 2008年9月第10期 |
| 引用格式： | 张帆，吕亚兰，相征. LDO线性稳压器中的折返式限流电路设计[J]. 中国科技论文在线精品论文，2008，1（10）：1189-1193. |
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