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TDD-LTE系统帧定时同步的FPGA实现
发表时间:2010-05-31 浏览量:1924 下载量:906
全部作者: | 李世兴,程方 |
作者单位: | 重庆邮电大学通信与信息工程学院 |
摘 要: | 针对时分双工-长期演进(time division duplexing-long term evolution, TDD-LTE)的同步性能需求,在研究TDD-LTE系统帧结构和主同步信号及Schmidl算法基础上,提出一种快速实现帧定时同步的方法。该方法以Schmidl算法为基础,并做如下改进:对待处理数据进行16倍降采样;设计滑动窗长为128点;设计滑动步长为32点。详细分析基于改进算法的同步实现原理,并详述帧定时同步的现场可编程门阵列(field programmable gate array,FPGA)实现方案,采用超高速集成电路硬件描述语言(very�high�speed integrated circuit hardware description language, VHDL)描述实现。仿真结果表明:该方法满足TDD-LTE系统帧定时同步的要求, 在不影响同步精度的前提下,同步迅速,结构简单。 |
关 键 词: | 无线通信;时分双工-长期演进;帧定时同步;Schmidl算法;现场可编程门阵列 |
Title: | The FPGA realization of frame timing synchronization in TDD-LTE system |
Author: | LI Shixing, CHENG Fang |
Organization: | School of Communication and Information Engineering, Chongqing University of Posts and Telecommunications |
Abstract: | This paper illuminates a method to achieve fast frame timing synchronization based on the research of the frame structure and the primary synchronization signal for time division duplexing-long term evolution (TDD-LTE) system and Schmidl algorithm. This method is based on the Schmidl algorithm and the following improvements are proposed, they are making 16�fold down�sampling processing on the data and setting 128 dots for sliding window length and setting 32 dots for sliding step. In this paper, the synchronization implementation principle which is based on the improved algorithm is analyzed in detail. A field programmable gate array (FPGA)�based implementation scheme for frame timing synchronization is deeply introduced and coded in very�high�speed integrated circuit hardware description language(VHDL). The simulation result indicates that this method meets the requirements of the synchronization of the TDD-LTE system and achieves fast and accurate synchronization through a simple structure. |
Key words: | wireless communication;time division duplexing-long term evolution (TDD-LTE); frame timing synchronization; Schmidl algorithm; field programmable gate array |
发表期数: | 2010年5月第10期 |
引用格式: | 李世兴,程方. TDD-LTE系统帧定时同步的FPGA实现[J]. 中国科技论文在线精品论文,2010,3(10):996-1001. |
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