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混合基FFT处理器的设计与Verilog实现

发表时间:2008-05-31  浏览量:3435  下载量:1680
全部作者: 王靖琰,曹新民
作者单位: 中国科学院上海应用物理研究所
摘 要: 本文介绍了混合基快速傅里叶变换(fast Fourier transform,FFT)算法的基本原理,针对算法的结构和特点,提出了一种基于可编程逻辑器件(programmable logic device,PLD)设计6点混合基FFT处理器的方案。该方案采用单元结构的设计思路,对FFT处理器合理模块化,用Verilog语言对各个模块编程,并在QuartusⅡ软件环境下综合仿真,时序分析结果与MATLAB计算结果相一致,验证了设计的正确性。FFT与PLD相结合提高了运算速度,扩大了FFT的应用领域。
关 键 词: 数字信号处理;快速傅里叶变换处理器;混合基快速傅里叶变换;可编程逻辑器件;Verilog语言
Title: Design and Verilog implement of mixed-radix FFT processor
Author: WANG Jingyan, CAO Xinmin
Organization: Shanghai Institute of Applied Physics, Chinese Academy of Sciences
Abstract: A fundamental principle of the mixed-radix FFT was introduced. Based on the structure and operational characteristics of fast Fourier transform(FFT), an implementation method of 6 point mixed-radix FFT in programmable logic device(PLD) was presented. It divided the FFT processor into several modules, and carried out the programming with the Verilog to each module. The comparison between successional analysis result and MATLAB computed result had confirmed the design accuracy of comprehensive simulation under Quartus II software environment. The combination of PLD and FFT increased the handling speed of FFT processors and expanded in the field of application.
Key words: digital signal processing; fast Fourier transform(FFT) processor; mixed-radix fast Fourier transform(FFT); programmable logic device(PLD); Verilog
发表期数: 2008年9月第10期
引用格式: 王靖琰,曹新民. 混合基FFT处理器的设计与Verilog实现[J]. 中国科技论文在线精品论文,2008,1(10):1128-1135.
 
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