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基于FPGA的自适应数字下变频器实现

发表时间:2018-05-31  浏览量:505  下载量:67
全部作者: 谷广宇,付永庆,于智欣
作者单位: 哈尔滨工程大学信息与通信工程学院
摘 要: 针对宽带数字信号的数据存储、传输和实时处理的压力非常大,而窄带数字信号的实时处理比较容易的特点,设计一种基于现场可编程门阵列(field programmable gate array,FPGA)的自适应数字下变频系统。数字下变频模块采用多路选择器作为本地振荡信号,以便对不同频率的输入信号进行处理,下变频后的数据通过数字带通滤波器滤除高频信号,获得有效的低频信号。基于Xilinx ISE14.7平台对各个模块进行设计和编译,借助Modelsim10.1c和Matlab软件进行仿真和验证,最后在FPGA中验证该设计方案的可行性。
关 键 词: 信息处理技术;自适应;数字下变频;有限脉冲响应滤波器;现场可编程门阵列(FPGA)
Title: Implementation of adaptive digital down-converter based on FPGA
Author: GU Guangyu, FU Yongqing, YU Zhixin
Organization: College of Information and Communication Engineering, Harbin Engineering University
Abstract: Aiming at the pressure of the data storage, transmission and real-time processing of wideband digital signal is very large. However the real-time processing of narrowband digital signal is easy. This article designs an adaptive digital down-conversion system based on field programmable gate array (FPGA). The digital down-conversion module uses the multiplexer as the local oscillation signal to process the input signals of different frequencies. Then the data filter out the high-frequency signal to obtain the valid low-frequency signal through a band pass digital filter. Each module is designed and compiled based on the Xilinx ISE14.7 platform. With the help of Modelsim10.1c and Matlab software, simulation and verification are processed. Finally, the feasibility of the design scheme is verified in FPGA.
Key words: information processing technology; adaptive; digital down-conversion; finite impulse response filter; field programmable gate array (FPGA)
发表期数: 2018年5月第10期
引用格式: 谷广宇,付永庆,于智欣. 基于FPGA的自适应数字下变频器实现[J]. 中国科技论文在线精品论文,2018,11(10):1007-1013.
 
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