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基于混沌置乱的数据加密算法的FPGA实现
发表时间：2019-12-31 浏览量：1059 下载量：198
| 全部作者： | 孙婧怡，付永庆，郭胜男 |
| 作者单位： | 哈尔滨工程大学信息与通信工程学院 |
| 摘 要： | 数据加密作为保密通信中对信息的预处理，其主要目的是保证所传信息的安全性和增强通信系统的抗人为或偶发干扰能力。本文利用Logisitic映射的离散混沌序列与伪随机序列对数据的行与列进行随机排列后输出，达到置乱的目的。基于Quartus II 13.0平台采用硬件描述语言Verilog HDL设计和编译，并用Modelsim和Matlab软件对算法进行仿真和验证，最后在现场可编程门阵列（field programmable gate array，FPGA）中验证该算法的可行性。实验结果表明，该算法简单可行且可以保证传输数据的安全性。 |
| 关 键 词： | 通信技术；Logisitic映射；置乱；Verilog HDL；现场可编程门阵列（FPGA） |
| Title： | FPGA implementation of data encryption algorithm based on chaotic scrambling |
| Author： | SUN Jingyi, FU Yongqing, GUO Shengnan |
| Organization： | College of Information and Communication Engineering, Harbin Engineering University |
| Abstract： | Data encryption, as the preprocessing of information in secure communication, aims to ensure the security of transmitted information and to enhance the communication system’s ability to resist artificial or accidental interference. In this paper, the discrete chaotic sequence of Logisitic mapping and pseudo-random sequence are used to randomly arrange the rows and columns of data and then to output, so as to achieve the purpose of scrambling. Hardware description language Verilog HDL is used for design and compilation based on Quartus II 13.0 platform, and the algorithm is simulated and verified by Modelsim and Matlab software. Finally, the feasibility of the algorithm is verified in field programmable gate array (FPGA). Experimental results show that the algorithm is simple and feasible, which can guarantee the security of data transmission. |
| Key words： | communications technology; Logisitic mapping; scrambling; Verilog HDL; field programmable gate array (FPGA) |
| 发表期数： | 2019年12月第6期 |
| 引用格式： | 孙婧怡，付永庆，郭胜男. 基于混沌置乱的数据加密算法的FPGA实现[J]. 中国科技论文在线精品论文，2019，12（6）：985-993. |
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